1. Field of the Invention
This invention relates to a filter circuit and more particularly to an all-pass filter circuit which controls group delay.
2. Description of the Related Art
In recent years, a requirement for the high performance of filters became stronger. Problems occurring at this time are associated with the power consumption and circuit integration density. However, if the power consumption is lowered and the integration density is enhanced, degradation in the characteristic of the filter, for example, degradation in the noise performance becomes a problem.
The transfer function of a linear all-pass filter can be expressed by the following equations (1) and (2). The equation (1) indicates the transfer function H1(s) attained when the all-pass filter is configured by use of a low-pass filter (which is hereinafter referred to as an LPF). The equation (2) indicates the transfer function H2(s) attained when the all-pass filter is configured by use of a high-pass filter (which is hereinafter referred to as an HPF). In this case, “s” indicates “jω” and “j” is an imaginary unit.
                                          H            1                    ⁡                      (            s            )                          =                              1            -                          2              ⁢                              LPF                ⁡                                  (                  s                  )                                                              =                                    1              -                                                2                  ⁢                                      ω                    0                                                                    s                  +                                      ω                    0                                                                        =                                          s                -                                  ω                  0                                                            s                +                                  ω                  0                                                                                        (        1        )                                                      H            2                    ⁡                      (            s            )                          =                                            2              ⁢                              HPF                ⁡                                  (                  s                  )                                                      -            1                    =                                                                      2                  ⁢                  s                                                  s                  +                                      ω                    0                                                              -              1                        =                                          s                -                                  ω                  0                                                            s                +                                  ω                  0                                                                                        (        2        )            
LPF(s) in the equation (1) and HPF(s) in the equation (2) respectively indicate transfer functions of the low-pass filter LPF and high-pass filter HPF.
Further, ω0 is expressed by the following equation.
                              ω          0                =                  1          CR                                    (        3        )            
where C indicates a capacitance value and R indicates a resistance value. Further, the group delay amount τ caused by the transfer functions of the equations (1) and (2) is expressed by the following equation.
                    τ        =                  2          CR                                    (        4        )            
In the all-pass filter having the transfer function indicated in the equation (1) or (2), the group delay amount in the band can be controlled by controlling ω0. Therefore, in the case of the all-pass filter contained in an IC (Integrated Circuit), the group delay amount τ can be controlled by controlling ω0 by use of a variable resistor.
For example, the all-pass filter contained in the IC is configured by using a gilbert circuit as a current amplifier (gm amplifier). The gilbert circuit is used as a variable gm amplifier by supplying a control signal to the gilbert circuit. Alternatively, a circuit using a MOS linear circuit is used as the variable resistor to configure the all-pass filter. In order to keep the in-band group delay constant irrespective of the frequency, circuits having preset group delay amounts are cascade-connected in the all-pass filter.
Further, as the related art described above, an all-pass filter which is suitably contained in the IC is disclosed (refer to KLAAS BULT et al., “A CMOS Analog Continuous-Time Delay Line with Adaptive Delay-time Control”, IEEE J. Solid-State Circuits, vol. SC-23, no. 3, pp. 759–766, June 1988).
The gilbert circuit subjects an input signal to the expansion or compression process. Therefore, the noise characteristic of the all-pass filter is deteriorated. In order to solve the problem of the noise, it is unavoidable to increase a current to some extent. Further, when the all-pass filters are cascade-connected, the power consumption will increase.
In the circuit using the MOS linear circuit, a configuration using an OTA (Operational Trans-conductance Amplifier) can be considered. In this case, in order to compensate for the secondary distortion of the MOS transistor, it is necessary to convert an input in a differential fashion. As a result, the circuit scale increases.
Further, since a current inverter circuit is used in the above related art, it is necessary to voltage-current convert a signal which is input to the all-pass filter. Unlike a bipolar transistor, it is difficult to perform the voltage-current conversion without causing any distortion in the operation of the MOS transistor. However, in this case, if a BiCMOS process is used, it is possible to configure the above filter by using a voltage-current conversion circuit.
If the BiCMOS process is used, the chip cost will rise since the process cost is high in comparison with that for the MOS process. Further, if the MOS process is used, it is difficult to attain the configuration of the voltage-amplifier conversion circuit as described before and the circuit scale becomes relatively large even if the above circuit can be configured. Therefore, the chip area is inevitably increased and the chip cost will rise.
Further, in the above related art, in order to derive an output signal in the form of voltage, it is necessary to current-voltage convert the output signal of the filter. Therefore, the circuit configuration is attained by (voltage-current conversion circuit+all-pass filter+current-voltage conversion circuit). In this circuit, since two circuits including the voltage-current conversion circuit and current-voltage conversion circuit are required, the circuit scale increases.
Further, the control filter section is used for current transmission and the output impedance thereof is high. Therefore, it is subject to disturbance from the other circuits. Thus, in the case of multifunctional IC, it is necessary to pay much attention to the layout design and it becomes difficult to carryout the layout design.